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PCD5096 bảng dữ liệu(PDF) 2 Page - NXP Semiconductors |
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PCD5096 bảng dữ liệu(HTML) 2 Page - NXP Semiconductors |
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2 / 52 page ![]() 1997 Jan 22 2 Philips Semiconductors Preliminary specification Universal codec PCD5096 CONTENTS 1 FEATURES 2 GENERAL DESCRIPTION 3 APPLICATIONS 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING INFORMATION 6.1 Pin description 6.2 Pinning 6.3 Supply concept 7 FUNCTIONAL DESCRIPTION 7.1 General 7.2 Clocking 7.3 Reset and power-down strategy 8 MEMORY AND CONTROL REGISTERS 8.1 DSP memories 8.2 Data memory and control register map 8.3 Control registers organization 9 IOM 9.1 Features 9.2 Pin description 9.3 Functional description 9.4 Timing 9.5 IOM control table 9.6 IOM data buffers 9.7 Local loop 10 I2C-BUS INTERFACE 11 CODEC TEST LOOPS 11.1 Test modes definition 11.2 Codec test loop signal timing 12 APPLICATION INFORMATION 12.1 Small business systems 12.2 Large business systems 12.3 DECT and ISDN 13 APPLICATION EXAMPLES 13.1 PCD5096 with two active channels 13.2 Conference call between one PSTN line and two IOM buffers 13.3 Conference call between two PSTN lines and one IOM buffer 14 LIMITING VALUES 15 HANDLING 16 ELECTRICAL SPECIFICATIONS 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction 18.2 Reflow soldering 18.3 Wave soldering 18.4 Repairing soldered joints 19 DEFINITIONS 20 LIFE SUPPORT APPLICATIONS 21 PURCHASE OF PHILIPS I2C COMPONENTS |
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