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FUNCTIONAL DESCRIPTION

Clock Inputs (CLK_IN0 and CLK_IN1)

XO

or

2LVCMOS

or

Differential

Input

CLK_IN0

CLK_IN1

Inputsourceselect

(fromSMBUSRegister)

C

X0

C

X1

crystal

unit

C

ICB

C

ICB

CDC706

SCAS829A – SEPTEMBER 2006 – REVISED MARCH 2007

The CDC706 features two clock inputs which can be used as:

• Crystal oscillator input (default setting)

• Two independent single-ended LVCMOS inputs

• Differential signal input

The dedicated clock input can be selected by the input signal source Bit [7:6] of Byte 11.

Crystal Oscillator Inputs

The input frequency range in crystal mode is 8 MHz to 54 MHz. The CDC706 uses a Pierce-type oscillator

circuitry with included feedback resistance for the inverting amplifier. The user, however, has to add external

be calculated:

device including the board capacitance (stray capacitance of PCB).

It is important to use a short PCB trace from the device to the crystal unit to keep the stray capacitance of the

oscillator loop to a minimum.

Figure 14. Crystal Input Circuitry

In order to ensure a stable oscillating, a certain drive power must be applied. The CDC706 features an input

oscillator with adaptive gain control which relieves the user to manually program the gain. The drive level is the

amount of power dissipated by the oscillating crystal unit and is usually specified in terms of power dissipated by

the resonator (equivalent series resistance (ESR)). Figure 15 gives the resulting drive level vs crystal frequency

and ESR.

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