AD9271 datasheet(34/58 Pages) AD

34 / 58 page

AD9271

Preliminary Technical Data

Rev. PrA | Page 34 of 58

Table 13. Reference Settings

Selected

Mode

SENSE

Voltage

Resulting

VREF (V)

Resulting

Differential

Span (V p-p)

External

Reference

AVDD

N/A

2 × external

reference

Internal,

2 V p-p FSR

AGND to 0.2 V

1.0

2.0

Internal Reference Operation

A comparator within the AD9271 detects the potential at the

SENSE pin and configures the reference. If SENSE is grounded,

the reference amplifier switch is connected to the internal

resistor divider (see Figure 58), setting VREF to 1 V.

The REFT and REFB pins establish their input span of the ADC

core from the reference configuration. The analog input full-

scale range of the ADC equals twice the voltage at the reference

pin for either an internal or an external reference configuration.

1µF

0.1µF

VREF

SENSE

0.5V

REFT

0.1µF

4.7µF

0.1µF

REFB

SELECT

LOGIC

ADC

CORE

VIN–

VIN+

Figure 58. Internal Reference Configuration

1µF*

0.1µF*

VREF

SENSE

AVDD

0.5V

REFT

0.1µF

4.7µF

0.1µF

REFB

SELECT

LOGIC

ADC

CORE

VIN–

VIN+

EXTERNAL

REFERENCE

*OPTIONAL.

Figure 59. External Reference Operation

External Reference Operation

The use of an external reference may be necessary to enhance

the gain accuracy of the ADC or improve thermal drift charac-

teristics. Figure 61 shows the typical drift characteristics of the

internal reference in 1 V mode.

When the SENSE pin is tied to AVDD, the internal reference is

disabled, allowing the use of an external reference. The external

reference is loaded with an equivalent 6 kΩ load. An internal

reference buffer generates the positive and negative full-scale

references, REFT and REFB, for the ADC core. Therefore, the

external reference must be limited to a nominal of 1.0 V.

-25

-20

-15

-10

-5

00.5

11.5

2.5

33.5

Current Load (mA)

Figure 60. VREF Accuracy vs. Load, AD9271-50

-0.2

-0.18

-0.16

-0.14

-0.12

-0.1

-0.08

-0.06

-0.04

-0.02

0.02

-40

-20

204060

TEMPERATURE (oC)

Figure 61. Typical VREF Drift, AD9271-50

AD9271 bảng dữ liệu(PDF) 34 Page - Analog Devices

AD9271 bảng dữ liệu(HTML) 34 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58

bảng dữ liệu tải về

Link URL