TMS320F datasheet(65/389 Pages) TI

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5-1

Program Control

This chapter discusses the processes and features involved in controlling the

flow of a program on the ’C24x.

Program control involves controlling the order in which one or more blocks of

instructions are executed. Normally, the flow of a program is sequential; the

’C24x executes instructions at consecutive program-memory addresses. At

times, a program must branch to a nonsequential address and then execute

instructions sequentially at that new location. For this purpose, the ’C24x sup-

ports branches, calls, returns, repeats, and interrupts.

Topic

Page

5.1

Program-Address Generation

5-2

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5.2

Pipeline Operation

5-7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.3

Branches, Calls, and Returns

5-8

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.4

Conditional Branches, Calls, and Returns

5-10

. . . . . . . . . . . . . . . . . . . . . .

5.5

Repeating a Single Instruction

5-14

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.6

Interrupts

5-15

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.7

CPU Interrupt Registers

5-17

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 5

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