AT83SND2CMP3B datasheet(175/241 Pages) ATMEL

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4341F–MP3–03/06

AT8xC51SND2C/MP3B

Figure 20-15. Baud Rate Formula (Mode 2)

20.5

Multiprocessor Communication (Modes 2 and 3)

Modes 2 and 3 provide a ninth-bit mode to facilitate multiprocessor communication. To enable

this feature, set SM2 bit in SCON register. When the multiprocessor communication feature is

enabled, the serial Port can differentiate between data frames (ninth bit clear) and address

frames (ninth bit set). This allows the AT8xC51SND2C to function as a slave processor in an

environment where multiple slave processors share a single serial line.

When the multiprocessor communication feature is enabled, the receiver ignores frames with

the ninth bit clear. The receiver examines frames with the ninth bit set for an address match. If

the received address matches the slaves address, the receiver hardware sets RB8 and RI bits in

SCON register, generating an interrupt.

The addressed slave’s software then clears SM2 bit in SCON register and prepares to receive

the data Bytes. The other slaves are unaffected by these data Bytes because they are waiting to

respond to their own addresses.

20.6

Automatic Address Recognition

The automatic address recognition feature is enabled when the multiprocessor communication

feature is enabled (SM2 bit in SCON register is set).

Implemented in hardware, automatic address recognition enhances the multiprocessor commu-

nication feature by allowing the Serial Port to examine the address of each incoming command

frame. Only when the Serial Port recognizes its own address, the receiver sets RI bit in SCON

frames addressed to other devices.

If desired, the automatic address recognition feature in mode 1 may be enabled. In this configu-

ration, the stop bit takes the place of the ninth data bit. Bit RI is set only when the received

command frame address matches the device’s address and is terminated by a valid stop bit.

To support automatic address recognition, a device is identified by a given address and a broad-

cast address.

Note:

The multiprocessor communication and automatic address recognition features cannot be

enabled in mode 0 (i.e, setting SM2 bit in SCON register in mode 0 has no effect).

20.6.1

Given Address

Each device has an individual address that is specified in SADDR register; the SADEN register

is a mask Byte that contains don’t care bits (defined by zeros) to form the device’s given

address. The don’t care bits provide the flexibility to address one or more slaves at a time. The

following example illustrates how a given address is formed.

To address a device by its individual address, the SADEN mask Byte must be 1111 1111b.

For example:

SADDR = 0101 0110b

SADEN = 1111 1100b

Given = 0101 01XXb

The following is an example of how to use given addresses to address different slaves:

Slave A:SADDR = 1111 0001b

Baud_Rate=

SMOD1

⋅ F

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