WM9705SEFTSLASHV datasheet(49/55 Pages) WOLFSON

49 / 55 page

WM9705

Production Data

PD Rev 4.4 August 2006

MASK FUNCTION

It is anticipated that sources of glitch noise such as LCD ‘invert’ signals will likely be picked up by

the touchscreen plates and affect measurement accuracy. In order to minimise this effect, a

signal may be applied to the MASK pin, which depending on the setting of the MSK[1-0] bits in

is a function of the value set in the MSK[1-0] bits of register 78h and is described below:

MSK[1-0]

EFFECT OF SIGNAL ON MASK PIN

Mask has no effect on conversions

Static; ‘hi’ on MASK pin stops conversions, ‘lo’ has no effect.

Edge triggered; rising or falling edge on MASK pin delays conversions

by an amount set in the DEL[3-0] register. Conversions are asynchronous to

the MASK signal.

Synchronous mode; conversions wait until rising or falling edge on MASK

initiates cycle; screen starts to be driven when the edge arrives, the

conversion sample being taken a period set by DEL[3-0] after the edge.

Table 28 Mask Control

PEN-DOWN DETECTION

Pen down detection is an important feature of the pen digitiser function; it allows screen driving

and conversion operations to be suspended whilst the pen is not in contact with the screen so

conserving power and minimising audio signal interference due to screen currents.

Pen down detection is performed by connecting an external resistor (external resistor is

connected between pin 29 (PDRES) and AVdd) to the Y+ terminal of the screen, grounding the X-

terminal, and connecting the Y+ terminal to a comparator. This comparator has a threshold which

lies midway between the ground and AVdd voltages. When the pen is applied to the screen, the

resistance between the plates falls, pulling down the voltage on the Y plate and hence the Y+

terminal voltage. When this resistance falls enough, the comparator is triggered, so detecting that

the ‘pen is down’.

The threshold of this Pen detection function is set at about midrail. Varying the pressure on the

pen, hence the pen resistance between the shorted plates, will cause the voltage on the pulled-up

plate to vary. The value of the external pull up resistor may be selected, so allowing the sensitivity

of the pen-down detect threshold to be adjusted. This allows the user more flexibility in tailoring

the pen detect threshold to different screen types.

A ‘zero power’ comparator (effectively a gate) is used as the comparator, which has a fairly

crudely set threshold, set at about mid supply. The output of this comparator is applied to the

PENDET pin, and also into the finite state machine controlling the conversion and screen drive

operations. Depending on the state of the PDEN bit in register 78h, this signal may be used to

halt conversion operations whilst pen is ‘up’. The PENDET pin can be active high or low

depending on the state of PINV. The default state of PINV is a 0 which means PENDET is active

high.

If the PDEN bit has not been set, then the state of the pen down detector output enables

conversions and screen drives only when the pen is detected as ‘down’. If PDEN bit is set, then

conversions and screen drives will continue whether pen is detected as up or down. This allows,

for example, for AUX channels to be converted whilst the pen is off the screen.

In order to provide more control over the sensitivity of the pen down detect threshold, an

alternative active comparator circuit is provided, along with a 4 bit DAC which is used to adjust the

comparator reference input voltage between near 0Volts and midrail. This allows lower pen

resistance to be detected, without the need to use very low external pull-up resistor values which

would otherwise be needed and which would consume large currents. When value 0h is written to

the pen detect dac register bits PDD[3-0] in register 78h, this extra comparator is powered off and

the zero power comparator used. When other values are written to this register, then the

comparator is enabled, and thresholds from near 0V to midrail are set as below in Table 29.

WM9705SEFT/V bảng dữ liệu(PDF) 49 Page - Wolfson Microelectronics plc

WM9705SEFT/V bảng dữ liệu(HTML) 49 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

bảng dữ liệu tải về

Link URL