AS7030B datasheet(120/129 Pages) AMSCO

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AS7030B

Functional Description

Datasheet

• PUBLIC

DS000716

• v1-00 • 2020-Jun-10

128

│ 119

Addr: 0xa1

STATUS2

Bit

Bit Name

Default

Access

Bit Description

irq_ecg_threshold

R_PUSH1

If programmed ecg_leadsdet_pol=0,

the ecg ADC value was below the

programmed ecg_threshold_low

setting

If programmed ecg_leadsdet_pol=1,

the ecg ADC value was above the

programmed ecg_threshold_high

setting

The STATUS2 register shows the current state of the interface. Some bits in here can trigger an

interrupt.

In normal mode, an asserted bit can be cleared by writing a '1' to it (in normal mode).

In clear-on-read mode, reading the STATUS2 register clears all bits.

CLIPSTATUS (Address 0xa2)

Figure 164:

CLIPSTATUS Register

Addr: 0xa2

CLIPSTATUS

Bit

Bit Name

Default

Access

Bit Description

7:4

Not used

pd_clipdetect_l

If this bit is asserted, photo diode

amplifier has been below the lower

threshold

pd_clipdetect_h

If this bit is asserted, photo diode

amplifier has been above the upper

threshold

sd_clipdetect_l

If this bit is asserted, photo diode

amplifier has been below the lower

threshold

sd_clipdetect_h

If this bit is asserted, photo diode

amplifier has been above the upper

threshold

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