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MPC5200 bảng dữ liệu(PDF) 46 Page - Freescale Semiconductor, Inc

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MPC5200 bảng dữ liệu(HTML) 46 Page - Freescale Semiconductor, Inc

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MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor
46
Figure 31. Ethernet Timing Diagram—MII Serial Management
3.3.10 USB
Table 34. MII Serial Management Channel Signal Timing
Sym
Description
Min
Max
Unit
SpecID
M9
MDC falling edge to MDIO output delay
0
25
ns
A9.9
M10
MDIO (input) to MDC rising edge setup
10
—
ns
A9.10
M11
MDIO (input) to MDC rising edge hold
10
—
ns
A9.11
M12
MDC pulse width high1
NOTES:
1
MDC is generated by MPC5200 with a duty cycle of 50% except when MII_SPEED in the FEC MII_SPEED control
register is changed during operation. See the MPC5200 User Manual [1].
160
—
ns
A9.12
M13
MDC pulse width low(1)
160
—
ns
A9.13
M14
MDC period2
2
The MDC period must be set to a value of less then or equal to 2.5 MHz (to be compliant with the IEEE MII
characteristic) by programming the FEC MII_SPEED control register. See the MPC5200 User Manual [1].
400
—
ns
A9.14
Table 35. Timing Specifications—USB Output Line
Sym
Description
Min
Max
Units
SpecID
1
USB Bit width1
NOTES:
1
Defined in the USB config register, (12 Mbit/s or 1.5 Mbit/s mode).
83.3
667
ns
A10.1
2
Transceiver enable time
83.3
667
ns
A10.2
3
Signal falling time
—
7.9
ns
A10.3
4
Signal rising time
—
7.9
ns
A10.4
M13
M12
M11
MDC (Output)
MDIO (Input)
MDIO (Output)
M10
M9
M14



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