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MPC5200 bảng dữ liệu(PDF) 29 Page - Freescale Semiconductor, Inc |
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MPC5200 bảng dữ liệu(HTML) 29 Page - Freescale Semiconductor, Inc |
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29 / 80 page ![]() Electrical and Thermal Characteristics MPC5200 Data Sheet, Rev. 4 Freescale Semiconductor 29 NOTES: 1. ACK can shorten the CS pulse width. Wait States (WS) can be programmed in the Chip Select X Register, Bit field WaitP and WaitX. It can be specified from 0 - 65535. 2. In Large Flash and MOST Graphics mode the shared PCI/ATA pins, used as address lines, are released at the same moment as the CS. This can cause that the address is changing earlier as CS is deasserted. 3. ACK is input and can be used to shorten the CS pulse width. 4. Only available in Large Flash and MOST Graphics mode. 5. Only available in MOST Graphics mode. Figure 12. Timing Diagram—Non-MUXed Mode t14 TS assertion before CS assertion - 0.8 ns 4 A7.16 t15 TS pulse width tPCIck tPCIck ns 4 A7.17 t16 TSIZ valid before CS assertion tIPBIck -ns 5 A7.18 t17 TSIZ hold after CS negation tIPBIck -ns 5 A7.19 Table 24. Non-MUXed Mode Timing (continued) Sym Description Min Max Units Notes SpecID ADDR DATA (rd) CS[x] R/W DATA (wr) OE t10 t11 TS t2 t6 t8 t7 t4 t3 t9 TSIZ[1:2] t5 t17 t16 ACK t12 t13 t14 t15 t1 |
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