UPD17062 datasheet(214/298 Pages) RENESAS

214 / 298 page

212

µPD17062

16.4.2

SIO0NWT (Serial I/O No-Wait) Flag

Writing appropriate data into the SIO0NWT flag can both release wait and execute forced wait.

(1) Writing 0 into SIO0NWT

In this case, forced wait is executed. In other words, the clock being supplied to the clock counter and

presettable shift register is disabled.

If the SIO0MS flag of the serial interface mode register is set to 1 at this time, shift clock operation stops

in the current state.

(2) Writing 1 into SIO0NWT

In this case, wait is released. In other words, the clock being supplied to the clock counter and presettable

shift register is enabled. If the SIO0MS flag of the serial interface mode register is set to 1 at this time,

the shift clock operation resumes from the state existing immediately before waiting began.

16.4.3

SBACK (Serial Bus Acknowledge)

The operation of SBACK varies with the operation mode of the serial interface.

The following describes the operation of SBACK.

(1) For reception in two-wire bus mode (SIO0TX = 0)

In this case, the data set in the SBACK flag is automatically output to the SDA pin at the acknowledge output

timing. The contents of the SBACK flag can be changed only by executing POKE instruction on the wait

Then, 0 is automatically transmitted as an acknowledgement. This eliminates the need to manipulate the

SBACK flag each time 1-byte data is received.

Data must be written to the SBACK flag after the 9th bit of the data has been set but before the 9th bit

of the next data is set. Normally, wait is instigated at the falling edge of the 8th or 9th bit. Therefore,

data should be written into the SBACK flag at this time.

Fig. 16-5

Timing of SBACK Rewriting during Wait

567

SCL

Clock counter

SDA

SBACK=1

SBACK=0

SBACK

←0

SIO0NWT

←1

Wait

UPD17062 bảng dữ liệu(PDF) 214 Page - Renesas Technology Corp