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UPD17062 bảng dữ liệu(PDF) 33 Page - Renesas Technology Corp

tên linh kiện UPD17062
Giải thích chi tiết về linh kiện  MOS INTEGRATED CIRCUIT
PDF  298 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
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UPD17062 bảng dữ liệu(HTML) 33 Page - Renesas Technology Corp

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µPD17062
5.1.1
Structure of the System Register (SYSREG)
The system register consists of 12 nibbles, located at addresses 74H to 7FH in data memory. The system
register is allocated regardless of the bank. That is, the system register is always located at addresses 74H
to 7FH, regardless of the bank.
Fig. 5-2 shows the structure.
Fig. 5-2
Structure of the System Register
5.1.2
Structure of the Data Buffer (DBF)
The data buffer consists of four nibbles located at addresses 0CH to 0FH of BANK0 in data memory.
Fig. 5-3 shows the structure.
Fig. 5-3
Structure of the Data Buffer
74H
75H
76H
77H
78H
79H
7AH
7BH
7CH
7DH
7EH
7FH
Address
Program
status word
(PSWORD)
System register (SYSREG)
Register
(symbol)
Address register
(AR)
Window
register
(WR)
Bank
register
(BANK)
Index register (IX)
Data memory row
address pointer
(MP)
General-purpose
register pointer
(RP)
0CH
DBF3
0DH
DBF2
0EH
DBF1
0FH
DBF0
Data buffer (DBF)
Address
Symbol



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