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UPD6708 bảng dữ liệu(PDF) 64 Page - Renesas Technology Corp

tên linh kiện UPD6708
Giải thích chi tiết về linh kiện  MOS INTEGRATED CIRCUIT
PDF  74 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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UPD6708 bảng dữ liệu(HTML) 64 Page - Renesas Technology Corp

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62
µPD6708
(4)
Processing in case of end during master reception return code (7H)
Note
To distinguish data from receive data (slave reception, broadcast reception) newly input in the next communication
frame, after reading RDB (inputting one serial clock pulse to SCK pin), STR should be read (inputting one serial
clock pulse to SCK pin) within the time shown below.
• When the next frame is mode 2
: Approx. 290
µs
• When the next frame is mode 1
: Approx. 400
µs
• When the next frame is mode 0
: Approx. 1580
µs
However, the above time limits for reading STR do not apply if this processing routine is executed in the reception
disabled state after executing the SETREV command.
The flowcharts for slave reception processing and broadcast reception processing are the same as for master reception
processing, and are therefore omitted here.
Start
Mre = 1 ?
Set master reception flag (Mre).
Mre
← 1
Note
Y
Read RDB
Read RDB
Read RDB
N3
←
number of master
receive data bytes
Read STR
RDB empty ?
Read RDB
N
N
Mre
← 0
End
Y
Read slave address (higher 8 bits).
Read slave address (lower 4 bits)
and control bits.
Read number of master receive data bytes.
Read master receive data.



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