TAS5036B datasheet(21/56 Pages) TI

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Architecture Overview

SLES073—February 2003

TAS5036B

2.2

Reset, Power Down, and Status

The reset, power down, and status circuitry provides the necessary controls to bring the TAS5036B to the initial

inactive condition, achieve low power standby, and report system status.

2.2.1 Reset—RESET

The TAS5036B is placed in the reset mode by setting the RESET terminal low.

RESET is an asynchronous control signal that restores the TAS5036B to its default conditions, sets the valid

1–6 outputs low, and places the PWM in the hard mute state. Volume is immediately set to full attenuation

(there is no ramp down).

As long as the RESET terminal is held low, the device is in the reset state. During reset, all I2C and serial data

bus operations are ignored. Table 2–6 shows the device output signals while RESET is active.

Upon the release of RESET, if POWER_DWN is high, the system performs a 4-ms to 5-ms device initialization

and then ramps the volume up to 0 db using a soft volume update sequence. If MCLK_IN is not active when

RESET is released high, then a 4-ms to 5-ms initialization sequence is produced once MCLK_IN becomes

active.

During device initialization all controls are reset to their initial states. Table 2–7 shows the control settings that

are changed during initialization.

RESET should be applied during power-up initialization or while changing the master slave clock states.

Table 2–6. Device Outputs During Reset

SIGNAL

MODE

SIGNAL STATE

Valid 1–Valid 6

All

Low

PWM P-outputs

All

Low

PWM M-outputs

All

Low

MCLKOUT

All

Low

SCLK

Master

Low

SCLK

Slave

Signal input

LRCLK

Master

Low

LRCLK

Slave

Signal input

SDA

All

Signal input

CLIP

All

High

Because the RESET is an asynchronous control signal, small clicks and pops can be produced during the

application (the leading edge) of this control. However, when RESET is released, the transition from the hard

mute state back to normal operation is performed synchronously using a quiet sequence.

If a completely quiet reset sequence is desired, MUTE should be applied before applying RESET.

Table 2–7. Values Set During Reset

CONTROL

SETTING

Volume

0 dB

MCLK_IN frequency

256

Master/slave mode

M_S terminal state

Automute

Enabled

De-emphasis

None

DC offset

Interchannel delay

Each channel is set to default value

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