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S32K310 bảng dữ liệu(PDF) 77 Page - NXP Semiconductors

tên linh kiện S32K310
Giải thích chi tiết về linh kiện  Supports S32K344, S32K324, S32K314, S32K312, S32K341 and S32K342. Data is preliminary for S32K311, S32K310, S32K328, S32K338, S32K348, S32K358 and S32K388
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Table 22. GPIO DC electrical specifications, 5.0V (4.5V - 5.5V) (continued)
Symbol
Description
Min
Typ
Max
Unit
Condition
Spec
Number
IOL_50_SP
5.0V output low
current for Standard
Plus GPIO and
RESET IO 4, 5
5.0
—
—
mA
DSE =1, VOL <= 0.7V
—
IOL_50_M
5.0V output low
current for medium
GPIO 4, 5
8.0
—
—
mA
DSE =1, VOL <= 0.7V
—
IOL_50_F
5.0V output low
current for Fast
GPIO 4, 5
12.0
—
—
mA
DSE =1, VOL <= 0.7V
—
FMAX_50_S
5.0V maximum
frequency for
Standard GPIO 4, 6
—
—
10
MHz
3.6V - 5.5V, total 25pF
load includes internal
5pF, PCB trace ~10pF
and external 10pF.
—
FMAX_50_SP
5.0V maximum
frequency for
Standard Plus
GPIO 4, 6
—
—
25
MHz
3.6V - 5.5V, total 25pF
load includes internal
5pF, PCB trace ~10pF
and external 10pF.
—
FMAX_50_M
5.0V maximum
frequency for
Medium GPIO 4, 6
—
—
25
MHz
3.6V - 5.5V, total 25pF
load includes internal
5pF, PCB trace ~10pF
and external 10pF
—
FMAX_50_F
5.0V maximum
frequency for Fast
GPIO 4, 6
—
—
25
MHz
3.6V - 5.5V, total 25pF
load includes internal
5pF, PCB trace ~10pF
and external 10pF.
—
IOHT
Output high current
total for all ports 7
—
—
100
mA
—
—
1. Maximum length of RESET pulse will be filtered by an internal filter on this pin.
2. Minimum length of RESET pulse, guaranteed not to be filtered by the internal filter.
3. A positive value is leakage flowing into pin with pin at VDD_HV_A/B (the GPIO supply level); a negative value is leakage
flowing out the pin with the pin at ground.
4. GPIO output transition time information can be obtained from the device IBIS model. IBIS models are recommended for
system level simulations, as discrete values for I/O transition times are not representative of the I/O pad behavior when
connected to an actual transmission line load.
5. I/O output current specifications are valid for the given reference load figure, and the constraints given in the Operating
Conditions of this document.
6. I/O timing specifications are valid for the un-terminated transmission line reference load given in the figure below. A
lumped 8pF load is assumed at the end of a 5 inch microstrip trace on standard FR4 with approximately 1.5pF/inch (25pF
total with margin).
7. To determine total switching current on any I/O supply, current values per output pin should not be incrementally summed.
I/O interfaces on the device are asynchronous to each other, so not all switching occurs at the same instant. Actual use
case must be considered.
NXP Semiconductors
I/O parameters
S32K3xx Data Sheet, Rev. 7, 04/2023
Data Sheet: Technical Data
Preliminary Information
77 / 146



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