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November 16, 2007

IDT70P9268

Very Low Power 16K x 16 Synchronous Mobile Multimedia Interface (M2I) Dual Port Static RAM

Industrial Temperature Range

Timing Waveform of Non-Mux’d Port Read-to-Write-to-Read

NOTES:

1. Output state (High, Low, or High-impedance) is determined by the previous cycle control signals.

2.

CE and ADS = VIL; CNTEN, and CNTRPT = VIH. "NOP" is "No Operation".

3. Addresses do not have to be accessed sequentially since

ADS = VIL constantly loads the address on the rising edge of the CLK; numbers

are for reference use only.

4. "NOP" is "No Operation." Data in memory at the selected address may be corrupted and should be re-written to guarantee data integrity.

CLK

Dn+2

tSA

tHA

An

READ

An+1

An+2

An+2

An+3

An+4

Qn+3

NOP

(4)

WRITE

READ

tSC

tHC

tSD

tHD

Qn

tCH

tCL

tCYC

tSB

tHB

tSW

tHW

tSW

tHW

tCD

tCKHZ

tCKHZ

CE

R/W

ADDRESS

DATA

IN

DATAOUT

(1)

UB / LB