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IDT70P9268 bảng dữ liệu(PDF) 7 Page - Renesas Technology Corp |
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IDT70P9268 bảng dữ liệu(HTML) 7 Page - Renesas Technology Corp |
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7 / 24 page ![]() 7 of 23 November 16, 2007 IDT70P9268 Very Low Power 16K x 16 Synchronous Mobile Multimedia Interface (M2I) Dual Port Static RAM Industrial Temperature Range DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (VDD = 1.8V +/- 100mV) NOTES: 1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency clock cycle of 1/tCYC, using “AC TEST CONDITIONS” at input levels of GND to 1.8V. 2. f = 0 means no address, clock, or control lines change. Applies only to input at CMOS level standby. 3. Port “A” may be either left or right port. Port “B” is the opposite from port “A”. AC Test Conditions Input Pulse Levels VSS to VDD Input Rise/Fall Times 3ns Max. Input Timing Reference Levels VDD/2 Output Reference Levels VDD/2 Output Load Figure 1 1.8V R1 13500 Ω R2 13500 Ω 70P9268 Symbol Parameter Test Conditions Typ. Max. IDD Dynamic Operating Current (Both Ports Active) CEL and CER = VIL, Outputs Disabled, f = fMAX (1) 15 mA 25 mA ISB1 Standby Current (Both Ports – TTL Inputs) CEL = CER = VIH, Outputs Disabled, f = fMAX (1) 2 mA 4 mA ISB2 Standby Current (One Port – TTL Inputs) CE”A” = VIL and CE”B” = VIH (3), Active Port Outputs Disabled, f = fMAX (1) 3 mA 5 mA ISB3 Full Standby Current (Both Ports CMOS Inputs) Both Ports Outputs Disabled CEL and CER > VDD – 0.2V, VIN > VDD – 0.2V, or VIN < 0.2V, f = 0 (2) 2 uA 8 uA ISB4 Full Standby Current (One Port – CMOS Inputs) CE”A” < 0.2V and CE”B” > VDD – 0.2V, VIN > VDD – 0.2V or VIN < 0.2V, Active Port Outputs Disabled, f = fMAX (1) 3 mA 5 mA IZZ Sleep Mode Current ZZL and ZZR > VDD – 0.2V 2 uA 8 uA R1 R2 30pF(1) 1.8V Figure 1. AC Output Test Level (5pF for tLZ, tHZ, tWZ, tOW) |
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