X40410V8-C datasheet(1/24 Pages) RENESAS

tên linh kiện	X40410V8-C

Giải thích chi tiết về linh kiện	4kbit EEPROM Dual Voltage Monitor with Integrated CPU Supervisor

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FN8116 Rev 0.00

Page 1 of 24

March 28, 2005

FN8116

Rev 0.00

March 28, 2005

X40410, X40411, X40414, X40415

4kbit EEPROM Dual Voltage Monitor with Integrated CPU Supervisor

DATASHEET

FEATURES

• Dual voltage detection and reset assertion

—Standard reset threshold settings

See Selection table on page 2.

—Adjust low voltage reset threshold voltages

using special programming sequence

—Reset signal valid to VCC = 1V

—Monitor three voltages or detect power fail

• Independent Core Voltage Monitor (V2MON)

• Fault detection register

• Selectable power-on reset timeout (0.05s,

0.2s, 0.4s, 0.8s)

• Selectable watchdog timer interval (25ms,

200ms,1.4s, off)

• Low power CMOS

—25µA typical standby current, watchdog on

—6µA typical standby current, watchdog off

• 4Kbits of EEPROM

—16 byte page write mode

—5ms write cycle time (typical)

• Built-in inadvertent write protection

—Power-up/power-down protection circuitry

—Block lock protect none or 1/2 of EEPROM

• 400kHz 2-wire interface

• 2.7V to 5.5V power supply operation

• Available packages

—8-lead SOIC, TSSOP

• Monitor Voltages: 5V to 0.9V

• Memory Security

• Independent Core Voltage Monitor

APPLICATIONS

• Communication Equipment

—Routers, Hubs, Switches

—Disk Arrays, Network Storage

• Industrial Systems

—Process Control

—Intelligent Instrumentation

• Computer Systems

—Computers

—Network Servers

DESCRIPTION

The X40410/11/14/15 combines power-on reset con-

trol, watchdog timer, supply voltage supervision, and

secondary voltage supervision, and Block Lock™ pro-

tect serial EEPROM in one package. This combination

lowers system cost, reduces board space require-

ments, and increases reliability.

Applying voltage to VCC activates the power-on reset

circuit which holds RESET/RESET active for a period of

time. This allows the power supply and system oscilla-

tor to stabilize before the processor can execute code.

BLOCK DIAGRAM

V2FAIL

WDO

RESET

X40410/14

X40411/15

Fault Detection

Register

Status

Register

EEPROM

Array

Data

Register

Command

Decode Test

& Control

Logic

Power-on,

Low Voltage

Reset

Generation

V2MON

SDA

SCL

VCC

(V1MON)

+

-

User Programmable

Threshold

Reset Logic

+

-

VTRIP1

User Programmable

VTRIP2

Watchdog Timer

and

Reset Logic

V2MON

VCC or

*X40410/11= V2MON*

X40414/15 = VCC

NOT RECOMMEN

DED FOR NEW D

ESIGNS

NO RECOMMEND

ED REPLACEMEN

T

contact our Techn

ical Support Cent

er at

1-888-INTERSIL o

r www.intersil.com

/tsc

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nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Intersil Corporation	X40410V8-C	363Kb / 24P	Dual Voltage Monitor with Intergrated CPU Supervisor March 28, 2005

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