X40410V8-C datasheet(8/24 Pages) RENESAS

8 / 24 page

X40410, X40411, X40414, X40415

FN8116 Rev 0.00

Page 8 of 24

March 28, 2005

Figure 6. Valid Data Changes on the SDA Bus

At power-up, the Fault Detection Register is defaulted to

all “0”. The system needs to initialize this register to all

“1” before the actual monitoring take place. In the event

of any one of the monitored sources failed. The corre-

sponding bits in the register will change from a “1” to a

“0” to indicate the failure. At this moment, the system

should perform a read to the register and noted the

cause of the reset. After reading the register the system

should reset the register back to all “1” again. The state

of the Fault Detection Register can be read at any time

by performing a random read at address 0FFh, using the

special preamble.

The FDR can be read by performing a random read at

OFFh address of the register at any time. Only one byte

of data is read by the register read operation.

WDF, Watchdog Timer Fail Bit (Volatile)

The WDF bit will set to “0” when the WDO goes active.

LV1F, Low VCC Reset Fail Bit (Volatile)

The LV1F bit will be set to “0” when VCC (V1MON) falls

below VTRIP1.

LV2F, Low V2MON Reset Fail Bit (Volatile)

The LV2F bit will be set to “0” when V2MON falls below

VTRIP2.

SERIAL INTERFACE

Interface Conventions

The device supports a bidirectional bus oriented proto-

col. The protocol defines any device that sends data

onto the bus as a transmitter, and the receiving device

as the receiver. The device controlling the transfer is

called the master and the device being controlled is

called the slave. The master always initiates data trans-

fers, and provides the clock for both transmit and receive

operations. Therefore, the devices in this family operate

as slaves in all applications.

Serial Clock and Data

Data states on the SDA line can change only during

SCL LOW. SDA state changes during SCL HIGH are

reserved for indicating start and stop conditions. See

Figure 6.

Serial Start Condition

All commands are preceded by the start condition, which

is a HIGH to LOW transition of SDA when SCL is HIGH.

The device continuously monitors the SDA and SCL

lines for the start condition and will not respond to any

command until this condition has been met. See Figure

Serial Stop Condition

All communications must be terminated by a stop condi-

tion, which is a LOW to HIGH transition of SDA when SCL

is HIGH. The stop condition is also used to place the

device into the Standby power mode after a read

sequence. A stop condition can only be issued after the

transmitting device has released the bus. (See Figure 6).

SCL

SDA

Data Stable

Data Change

Data Stable

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