6.4

Write operations on software write protection register (SWP)

Write operations on SWP register are performed according to the state of the write protect lock bit (WPL).

When WPL bit is set to '1', the SWP register is in read-only mode. When WPL bit is set to '0', the user can update

the SWP register value.

Following a start condition the bus master sends a device select code with the R/W bit (RW) set to 0. The device

acknowledges this, as shown in Figure 10, and waits for the address bytes where the SWP register is located.

The device responds to each address byte with an acknowledge bit, and then waits for the data byte. See in

Section 5.5 Device addressing (Table 5, Table 6 and Table 7) how to address the software write protection

register.

When the bus master generates a stop condition immediately after the data byte ACK bit (in the tenth bit time

slot), the internal write cycle tW is triggered. A stop condition at any other time slot does not trigger the internal

write cycle.

During the internal write cycle, serial data (SDA) is disabled internally, and the device does not respond to any

requests (no ACK).

Sending more than one byte aborts the write cycle (write protection register content is unchanged).

If the software write protection register is write protected (WPL=1), the write operation on this register is not

executed and the accompanying data bytes are not acknowledged as shown in Figure 11.

Figure 10. Write sequence on software write protection register

Dev sel

Byte addr

Byte addr

Data in

ACK

RW

ACK

ACK

ACK

Figure 11. Write sequence on software write protection register with SWP = 1

Dev sel

Byte addr

Byte addr

Data in

ACK

RW

ACK

ACK

NoACK

M24256X-F

Write operations on software write protection register (SWP)

DS12380 - Rev 2

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