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FS6407 bảng dữ liệu(PDF) 42 Page - NXP Semiconductors |
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FS6407 bảng dữ liệu(HTML) 42 Page - NXP Semiconductors |
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42 / 111 page ![]() 42 NXP Semiconductors FS6407/FS6408 6.7.1 VPRE voltage pre-regulator A highly flexible SMPS pre-regulator is implemented in the FS6407/FS6408. Depending on the input voltage requirement, the device can be configured as “non-inverting buck-boost converter” (Figure 24) or “standard buck converter” (Figure 23). An external logic level MOSFET (N-type) is required to operate in “non-inverting buck-boost converter”. The connection of the external MOSFET is detected automatically during the start-up phase. The converter operates in Current Control mode in any configuration. The high-side switching MOSFET is integrated to make the current control easier. The PWM frequency is fixed at 440 kHz typical. The compensation network is fully integrated. VPRE output voltage is regulated between 6.0 V and 7.0 V. If the full current capability is not used for VCORE, VCCA, VAUX and CAN_5V, additional external LDO can be connected to VPRE to fulfill application needs while the current load remains below the maximum current capability in all conditions. Figure 23. Pre-regulator: buck configuration Figure 24. Pre-regulator: buck boost configuration When the converter is set up to work in boost mode at low VSUP, the transition between buck and boost mode is automatically handled by the device at VSUP_UV_7 threshold. Transition between buck mode and boost mode is based on hysteresis (Figure 25). • When VSUP > VSUP_UV_7, the converter works in Buck mode and the VPRE output is regulated at 6.5 V typical • When VSUP < VSUP_UV_7, the converter works in Boost mode and the VPRE output is regulated at 6.3 V typical L_VPRE PGND PGND PGND PGND PGND PGND ESR cap. <100 m Ω ESR cap. <10 m Ω PGND L_Vpre PGND PGND PGND Optional D_BB PGND PGND PGND ESR cap. <100 m Ω ESR cap. <10 m Ω PGND |
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