công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

FS6407 bảng dữ liệu(PDF) 31 Page - NXP Semiconductors

tên linh kiện FS6407
Giải thích chi tiết về linh kiện  Power system basis chip with high speed can transceiver
PDF  111 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  NXP [NXP Semiconductors]
Trang chủ  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6407 bảng dữ liệu(HTML) 31 Page - NXP Semiconductors

Back Button FS6407 Datasheet HTML 27Page - NXP Semiconductors FS6407 Datasheet HTML 28Page - NXP Semiconductors FS6407 Datasheet HTML 29Page - NXP Semiconductors FS6407 Datasheet HTML 30Page - NXP Semiconductors FS6407 Datasheet HTML 31Page - NXP Semiconductors FS6407 Datasheet HTML 32Page - NXP Semiconductors FS6407 Datasheet HTML 33Page - NXP Semiconductors FS6407 Datasheet HTML 34Page - NXP Semiconductors FS6407 Datasheet HTML 35Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 31 / 111 page
background image
NXP Semiconductors
31
FS6407/FS6408
6.3
Deep fail-safe state
The Fail-safe state machine monitors the RSTB pin of the device and count the number of reset(s) happening in case of fault detection
(see Reset error counter). As soon as either the reset error counter reach its final value or the RESET pin remains asserted low for more
than 8.0 s, the device moves to Deep Fail-safe state, identified by the “Wait Deep Fail-safe” state in the functional state diagram
(Figure 10).
When the device is in Deep Fail-safe state, all the regulators are OFF. To exit this state, a Key OFF / Key ON action is needed. IO_0 is
usually connected to key signal. Key OFF (IO_0 low) moves the device to LPOFF-Deep FS, and Key ON (IO_0 high) wakes up the device.
The final value of the reset error counter can be configured to 2 or 6 in the register INIT FSSM 2. During power up phase, the 8.0 s timer
starts when the Fail-safe state machine enters in the “Select pin config detection” state and stop when the RSTB pin is released. During
“INIT FS” state, the 8.0 s timer can be disabled in the register INIT SUPERVISOR 2. During “Normal WD running” state, the 8.0 s timer is
activated at each RSTB pin assertion.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com