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HC705P6AGRS/D bảng dữ liệu(PDF) 92 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  The Motorola MC68HC705P6A is an EPROM version of the MC68HC05P6 microcontroller
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Mask Option Register (MOR)
General Release Specification
MC68HC705P6A — Rev. 1.0
Mask Option Register (MOR)
11.3 Mask Option Register (MOR) $1EFF–$1F00
Mask options are programmed into the mask option register (MOR) by
the firmware in the bootloader ROM.
COP — COP Watchdog Enable
Setting the COP bit will enable the COP watchdog timer. The COP will
reset the MCU if the timeout period is reached before the COP
watchdog timer is cleared by the application software
and the voltage
applied to the IRQ/VPP pin is between VSS and VDD. Clearing the
COP bit will disable the COP watchdog timer regardless of the voltage
applied to the IRQ/VPP pin.
LEVEL — IRQ Edge Sensitivity
If the LEVEL bit is clear, the IRQ/VPP pin will only be sensitive to the
falling edge of the signal applied to the IRQ/VPP pin. If the LEVEL bit
is set, the IRQ/VPP pin will be sensitive to both the falling edge of the
input signal and the logic low level of the input signal on the IRQ/VPP
pin.
$1EFF
Bit 7
654321
Bit 0
Read:
PA7PU
PA6PU
PA5PU
PA4PU
PA3PU
PA2PU
PA1PU
PA0PU
Write:
Erased
State:
00000000
$1F00
Bit 7
654321
Bit 0
Read:
SECURE
RCOSC
SWAIT
SPR1
SPR0
LSBF
LEVEL
COP
Write:
Erased
State:
00000000
Figure 11-1. Mask Option Register (MOR)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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