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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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HC705P6AGRS/D bảng dữ liệu(PDF) 52 Page - NXP Semiconductors |
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HC705P6AGRS/D bảng dữ liệu(HTML) 52 Page - NXP Semiconductors |
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52 / 134 page  Input/Output Ports General Release Specification MC68HC705P6A — Rev. 1.0 Input/Output Ports 6.5 Port C Port C is an 8-bit bidirectional port which can share pins PC3–PC7 with the A/D subsystem. The port C data register is located at address $0002 and its data direction register (DDR) is located at address $0006. The contents of the port C data register are indeterminate at initial powerup and must be initialized by user software. Reset does not affect the data registers, but clears the DDRs, thereby setting all of the port pins to input mode. Writing a one to a DDR bit sets the corresponding port pin to output mode (see Figure 6-3). Port C may be used for general I/O applications when the A/D subsystem is disabled. The ADON bit in register ADSC is used to enable/disable the A/D subsystem. Care must be exercised when using pins PC0–PC2 while the A/D subsystem is enabled. Accidental changes to bits that affect pins PC3–PC7 in the data or DDR registers will produce unpredictable results in the A/D subsystem. See Section 9. Analog Subsystem. Figure 6-3. Port C I/O Circuitry READ $0002 WRITE $0002 READ $0006 DATA REGISTER BIT I/O PIN OUTPUT INTERNAL HC05 DATA BUS RESET (RST) WRITE $0006 DATA DIRECTION REGISTER BIT Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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