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68HC705JB2 bảng dữ liệu(PDF) 39 Page - NXP Semiconductors

tên linh kiện 68HC705JB2
Giải thích chi tiết về linh kiện  Industry standard M68HC05 CPU core
PDF  128 Pages
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nhà sản xuất  NXP [NXP Semiconductors]
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68HC705JB2 bảng dữ liệu(HTML) 39 Page - NXP Semiconductors

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August 28, 1998
GENERAL RELEASE SPECIFICATION
RESETS
REV 1.1
5-1
SECTION 5
RESETS
The MCU can be reset in five ways:
•
by an active low input to the RESET pin,
•
by initial power-on reset,
•
by an USB reset,
•
by an illegal address access, and
•
by a low voltage reset function.
The RESET pin is an I/O pin as shown in Figure 5-1. The internal steering diode
for discharge and pull-up device are not shown here. All the peripheral modules
which drive external pins will be reset by the synchronous reset signal (RST)
coming from a latch, which is synchronized to the internal bus clock and set by
any of the five reset sources.
Figure 5-1. Reset Block Diagram
RESET
RESET
LATCH
R
POWER-ON RESET
ILLEGAL ADDRESS RESET
INTERNAL
D
INTERNAL
CLOCK
S
RST
TO CPU
AND
LOW VOLTAGE RESET
VDD
SUBSYSTEMS
ADDRESS BUS
USB RESET DETECTION
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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