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M95256-R bảng dữ liệu(PDF) 7 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  256-Kbit serial SPI bus EEPROM with high-speed clock
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4.1
SPI modes
These devices can be driven by a microcontroller with its SPI peripheral running in either of the following two
modes:
•
CPOL = 0, CPHA = 0
•
CPOL = 1, CPHA = 1
For these two modes, input data is latched in on the rising edge of Serial clock (C), and output data is available
from the falling edge of Serial clock (C).
The difference between the two modes, as shown in Figure 6, is the clock polarity when the bus master is in
Stand-by mode and not transferring data:
•
C remains at 0 for (CPOL = 0, CPHA = 0)
•
C remains at 1 for (CPOL = 1, CPHA = 1)
Figure 6. SPI modes supported
MSB
MSB
C
D
Q
C
CPOL
0
1
CPHA
0
1
M95256-W M95256-R M95256-DF
SPI modes
DS4712 - Rev 22
page 7/51



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