FXPS7115D4S datasheet(31/74 Pages) NXP

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NXP Semiconductors

FXPS7115D4S

Digital absolute pressure sensor, 40 kPa to 115 kPa

Bit

Address Register

Type[1]

FDh

USERDATA_1D

UF1

USERDATA_1D[7:0]

FEh

USERDATA_1E

UF1

USERDATA_1E[7:0]

FFh

CRC_UF1

LOCK_UF1

REGF_BLOCKID[2:0]

CRC_UF1[3:0]

Table 35. User-accessible data — sensor specific information...continued

[1]

Memory type codes

R — Readable register with no OTP

F — User readable register with OTP

UF2 — One time user programmable OTP location region 2

[2]

Useful for I2C read wrap around mode to support temperature data. See Table 9 and Table 67.

7.7 Register information

7.7.1 COUNT - rolling counter register (address 00h)

The count register is a read-only register that provides the current value of a free-running

8-bit counter derived from the primary oscillator. A 10-bit prescaler divides the primary

oscillator frequency by 1000. Therefore, the value in the register increases by one count

every 100 μs and the counter rolls over every 25.6 ms.

Bit

Symbol

COUNT[7:0]

Reset

Access

Table 36. COUNT - rolling counter register (address 00h) bit allocation

7.7.2 Device status registers

The device status registers are read-only registers that contain device status information.

These registers are readable in SPI or I2C mode.

7.7.2.1 DEVSTAT - device status register (address 01h)

Bit

Symbol

DSP_ERR

reserved

COMM_

ERR

MEMTEMP_

ERR

SUPPLY_

ERR

TESTMOD

DEVRES

DEVINIT

Reset

reserved

Access

Table 37. DEVSTAT - device status register (address 01h) bit allocation

Bit

Symbol

Description

DSP_ERR

The DSP error flag is set if a DSP-specific error is present in the pressure signal DSP:

DSP_ERR = DSP_STAT[ST_INCMPLT] | DSP_STAT[CM_ERROR] | DSP_STAT[ST_

ERROR]

Table 38. DEVSTAT - device status register (address 01h) bit description

FXPS7115D4S

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1 — 9 August 2022

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