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FXPS7115D4S bảng dữ liệu(PDF) 26 Page - NXP Semiconductors

tên linh kiện FXPS7115D4S
Giải thích chi tiết về linh kiện  Digital absolute pressure sensor, 40 kPa to 115 kPa
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NXP Semiconductors
FXPS7115D4S
Digital absolute pressure sensor, 40 kPa to 115 kPa
a representation of the device status at the rising edge of SS_B for the previous SPI
command.
ST[1:0]
Status
Description
SF[1:0]
Priority
0
0
Device in Initialization
Device in initialization (ENDINIT not
set)
0
0
3
0
1
Normal Mode
Normal mode(ENDINIT set)
0
0
4
1
0
Self-test
Self-test(ST_CTRL[3:0] not equal to
'0000')
0
0
2
1
1
Internal Error Present
Detailed Status Field
Detailed
Status Field
1
Table 33. Basic status field for responses to register commands
7.5.5.2 Detailed status field
The response to sensor data requests includes a detailed status field (SF[1:0]). The
contents of the detailed status field is a representation of the device status at the rising
edge of SS_B for the previous SPI command.
SF[1:0]
Status Sources
DEVSTAT State
0
0
CM_ERROR
Temperature error
Bit set in DSP_STAT
Bit set in DEVSTAT2
0
1
User OTP memory error (UF2 or UF1)
User R/W memory error (UF2)
NXP OTP Memory error
U_OTP_ERR set in DEVSTAT2
U_RW_ERR set in DEVSTAT2
F_OTP_ERR set in DEVSTAT2
1
0
Test Mode active
Supply error
Reset error
TESTMODE bit set in DEVSTAT
Bit set in DEVSTAT1
DEVRES set
1
1
MISO error
SPI error
Bit set in DEVSTAT3
N/A
Table 34. Detailed status bit field descriptions
7.5.5.3 SPI error
The following external SPI conditions result in a SPI error:
• SCLK is high when SS_B is asserted.
• The number of SCLK rising edges detected while SS_B is asserted is not equal to 16.
• SCLK is high when SS_B is deasserted.
• CRC error is detected (MOSI).
• A register write command to any register other than the DEVLOCK_WR register is
received while ENDINIT is set.
If a SPI error is detected, the device responds with the error response as described in
Section 7.5.5.2 "Detailed status field" with the detailed status field set to “SPI Error” as
defined in Section 7.5.5.1 "Basic status field".
7.5.5.4 SPI data output verification error
The device includes a function to verify the integrity of the data output to the MISO pin.
The function compares the data transmitted on the MISO pin to the data intended to be
transmitted. If any one bit does not match, a SPI MISO mismatch fault is detected and
the MISO_ERR flag in the DEVSTAT2 register is set.
If a valid sensor data request message is received during the SPI transfer with the MISO
mismatch failure, the request is ignored and the device responds with the error response
FXPS7115D4S
All information provided in this document is subject to legal disclaimers.
© 2022 NXP B.V. All rights reserved.
Objective data sheet
Rev. 1 — 9 August 2022
26 / 74



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