UPSD3422EB40U6 datasheet(273/300 Pages) STMICROELECTRONICS

273 / 300 page

Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

UPSD3422, UPSD3433, UPSD3434, UPSD3454

DC and AC parameters

273/300

Table 212.

PSD module DC characteristics (with 5 V VDD)

Symbol

Parameter

Test condition (in

addition to those in

Table 211 on page 271)

Min.

Typ.

Max.

Unit

VIH

Input high voltage

4.5 V < VDD < 5.5 V

VDD +0.5

VIL

Input low voltage

4.5 V < VDD < 5.5 V

–0.5

0.8

VLKO

VDD (min) for Flash erase

and program

2.5

4.2

VOL

Output low voltage

IOL = 20 µA, VDD = 4.5 V

0.01

0.1

IOL = 8 mA, VDD = 4.5 V

0.25

0.45

VOH

Output high voltage

IOH = –20 µA, VDD = 4.5 V

4.4

4.49

IOH = –2 mA, VDD = 4.5 V

2.4

3.9

ISB

Standby supply current

for power-down mode

CSI > VDD – 0.3 V

(1)(2)

Internal Power-down mode is active.

PLD is in non-Turbo mode, and none of the inputs are switching.

120

250

µA

ILI

Input leakage current

VSS < VIN < VDD

–1

±0.1

µA

ILO

Output leakage current

0.45 < VOUT < VDD

–10

±5

µA

ICC

(DC)(3)

IOUT = 0 mA.

Operating

supply

current

PLD only

PLD_TURBO = Off,

f = 0 MHz (3)

µA/PT

PLD_TURBO = On,

f = 0 MHz

400

700

µA/PT

Flash

memory

During Flash memory

WRITE/Erase Only

Read only, f = 0 MHz

SRAM

f = 0 MHz

ICC

(AC)(3)

PLD AC adder

(4)

Please see Figure 95 on page 265 for the PLD current calculation.

Flash memory AC adder

1.5

2.5

mA/M

SRAM AC adder

1.5

3.0

mA/M

Obsolete

Product(s)

- Obsolete

Product(s)

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