WM8770 datasheet(30/52 Pages) WOLFSON

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WM8770

Production Data

PD Rev 4.1 June 2005

INFINITE ZERO DETECT ENABLE

Setting the IZD register bit will enable the internal infinite zero detect function:

BIT

LABEL

DEFAULT

DESCRIPTION

10011

DAC Channel Control

IZD

Infinite zero Mute Enable

0 : disable inifinite zero mute

1: enable infinite zero Mute

With IZD enabled, applying 1024 consecutive zero input samples to all 8 DAC channels will cause all

DAC outputs to be muted. Mute will be removed as soon as any channel receives a non-zero input.

ZERO FLAG OUTPUT

The DZFM control bits allow the selection of the eight DAC channel zero flag bits for output on the

ZFLAG1 and ZFLAG2 pins. A ‘1’ on ZFLAG1 or ZFLAG2 indicates 1024 consecutive zero input

samples to the channels selected.

BIT

LABEL

DEFAULT

DESCRIPTION

10101

Zero Flag Select

7:4

DZFM[3:0]

0000

Selects the ouput for ZFLAG1

and ZFLAG2 pins (see Table 9).

A ‘1’ indicates 1024 consecutive

zero input samples on the

channels selected.

DAC OUTPUT CONTROL

The DAC output control word determines how the left and right inputs to the audio Interface are

applied to the left and right DACs:

BIT

LABEL

DEFAULT

DESCRIPTION

PL[3:0]

Left

Output

Right

Output

0000

Mute

0001

Left

Mute

0010

Right

Mute

0011

(L+R)/2

Mute

0100

Mute

Left

0101

Left

0110

Right

Left

0111

(L+R)/2

Left

1000

Mute

Right

1001

Left

Right

1010

Right

1011

(L+R)/2

Right

1100

Mute

(L+R)/2

1101

Left

(L+R)/2

1110

Right

(L+R)/2

10011

DAC Control

7:4

PL[3:0]

1001

1111

(L+R)/2

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