WM8770 datasheet(35/52 Pages) WOLFSON

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Production Data

WM8770

PD Rev 4.1 June 2005

DAC OUTPUT PHASE

The DAC Phase control word determines whether the output of each DAC is non-inverted or inverted

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

Bit

DAC

Phase

DAC1L

1 = invert

DAC1R

1 = invert

DAC2L

1 = invert

DAC2R

1 = invert

DAC3L

1 = invert

DAC3R

1 = invert

DAC4L

1 = invert

10010

DAC Phase

7:0

PH[7:0]

00000000

DAC4R

1 = invert

ADC GAIN CONTROL

Control bits LAG[4:0] and RAG[4:0] control the ADC input gain, allowing the user to attenuate the

ADC input signal to match the full-scale range of the ADC. The gain is independently adjustable on

left and right inputs. Left and right inputs may also be independently muted. The LRBOTH control bit

allows the user to write the same attenuation value to both left and right volume control registers. The

ADC volume and mute also applies to the bypass signal path.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

4:0

LAG[4:0]

01100

(0dB)

Attenuation data for Left channel ADC gain in 1dB steps. See Table

MUTE

Mute for Left channel ADC:

0: Mute off

1: Mute on

11001

Attenuation

ADCL

LRBOTH

Setting LRBOTH will write the same gain value to LAG[4:0] and

RAG[4:0]

4:0

RAG[4:0]

01100

(0dB)

Attenuation data for right channel ADC gain in 1dB steps. See Table

MUTE

Mute for RIght channel ADC:

0: Mute off

1: Mute on

11010

Attenuation

ADCR

LRBOTH

Setting LRBOTH will write the same gain value to RAG[4:0] and

LAG[4:0]

ADC INPUT GAIN

Registers LAG and RAG control the left and right channel gain into the stereo ADC in 1dB steps from

+19dB to –12dB Table 8 shows how the attenuation levels are selected from the 5-bit words.

L/RAG[6:0]

ATTENUATION LEVEL

-12dB

01100

0dB

11111

+19dB

Table 13 ADC Gain Control

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