WM8770 datasheet(16/52 Pages) WOLFSON

tên linh kiện	WM8770

Giải thích chi tiết về linh kiện	24-bit, 192kHz 8-Channel Codec with Volume Control

PDF	52 Pages

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WM8770

Production Data

PD Rev 4.1 June 2005

In a real application the designer is unlikely to have control of the relative power up sequence of

AVDD and DVDD. Using the POR circuit to monitor VMIDADC ensures a reasonable delay between

applying power to the device and Device Ready.

Figure 10 and Figure 11 show typical power up scenarios in a real system. Both AVDD and DVDD

must be established and VMIDADC must have reached the threshold Vporr before the device is

ready and can be written to. Any writes to the device before Device Ready will be ignored.

Figure 10 shows DVDD powering up before AVDD. Figure 11 shows AVDD powering up before

DVDD. In both cases, the time from applying power to Device Ready is dominated by the charge

time of VMIDADC.

A 10uF cap is recommended for decoupling on VMIDADC. The charge time for VMIDADC will

dominate the time required for the device to become ready after power is applied. The time required

for VMIDADC to reach the threshold is a function of the VMIDADC resistor string and the decoupling

capacitor. The Resistor string has a typical equivalent resistance of 50kohm (+/-20%). Assuming a

10uF capacitor, the time required for VMIDADC to reach threshold of 1V is approx 110ms.

WM8770 bảng dữ liệu(PDF) 16 Page - Wolfson Microelectronics plc