ES9218PC datasheet(35/101 Pages) ESS

tên linh kiện	ES9218PC

Giải thích chi tiết về linh kiện	32-bit Stereo Low Power DAC with Headphone Amplifier, Analog Volume Control, and Output Switch

PDF	101 Pages

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nhà sản xuất	ESS [ESS Technology,Inc]

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ES9218P Datasheet

CONFIDENTIAL ADVANCE INFORMATION 1.8

December 6, 2018

ESS TECHNOLOGY, INC. 237 South Hillview Drive, Milpitas, CA 95035, USA Tel (408) 643-8800 • Fax (408) 643-8801

When a crystal is used with internal DVDD, it is possible for core timing requirements to be violated during chip startup. The following measures

should be taken to ensure default register values are loaded correctly:

1. Use a small decoupling capacitor at the DVDD pin. 1µF maximum is recommended.

2. Consult the crystal vendor to optimize crystal circuitry. The chip has a 2-stage reset pipeline. If the oscillator starts slowly for any reason,

more than two runt-pulses may occur and the reset pipeline will not be sufficient to prevent invalid core timing.

Figure 12. Non-optimal crystal circuitry

3. Perform two hardware resets (RESETB is de-asserted), followed by a software reset.

For a 1µF DVDD de-coupling capacitor:

70µ�� ≤ �� − �� ≤ 100µ��

50µ�� ≤ �� − �� ≤ 150µ��

DVDD should not fall below 1V during ��

�� − ��.

�� − �� ≈ 1.5��

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