FDMS3604S

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13

higher−frequency operation this impedance can

limit the gate current trying to charge the

MOSFET input capacitance. This will result in

slower rise and fall times and additional switching

losses. Power Stage has both the gate pins on the

same side of the package which allows for back

mounting of the driver IC to the board. This

provides a very compact path for the drive signals

and improves efficiency of the part

6. S2 pins should be connected to the GND plane

with multiple vias for a low impedance grounding.

Poor grounding can create a noise transient offset

voltage level between S2 and driver ground. This

could lead to faulty operation of the gate driver

and MOSFET

7. Use multiple vias on each copper area to

interconnect top, inner and bottom layers to help

smooth current flow and heat conduction. Vias

should be relatively large, around 8 mils to 10

mils, and of reasonable inductance. Critical high

frequency components such as ceramic bypass

caps should be located close to the part and on the

same side of the PCB. If not feasible, they should

be connected from the backside via a network of

low inductance vias

SyncFET IS trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other

countries.