MPFS250T-FCVG784I datasheet(36/128 Pages) MICROCHIP

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Table 37 • SD/SDIO Interface High-Speed Mode

Units

Max

Typ

Min

Symbol

Parameter

TDCSDHSCLK

SD device clock du-

ty cycle

13.8

2.2

TSDHSCKO

Clock to output de-

lay, all outputs

0.4

TSDHSDIVW

Input valid data

window

MHz

FSDHSCLK

High-speed mode

SD device clock fre-

quency

Table 38 • SD/SDIO Interface Standard Mode

Units

Max

Typ

Min

Symbol

Parameter

TDCSDHSCLK

SD device clock du-

ty cycle

4.5

–2.0

TSDSCKO

Clock to output de-

lay, all outputs

2.0

TSDSDCK

Input setup time,

all inputs

2.0

TSDSCKD

Input hold time, all

inputs

KHz

400

FSDIDCLK

Clock frequency in

identification mode

MHz

FSDSCLK

Standard SD device

clock frequency

6.1.6

eMMC

The following tables describe the eMMC. The test conditions for eMMC standard mode use an 8 mA drive

strength, fast slew rate, and a 30 pF load (I/O voltage of 3 V/1.8 V/1.2 V). For eMMC high-speed mode, the

test conditions use a 12 mA drive strength, fast slew rate, and 30 pF load (I/O voltage of 3 V/1.8 V/1.2 V).

For other eMMC modes, the test conditions use a 12 mA drive strength, fast slew rate, and 15 pF load (I/O

voltage of 1.8 V/1.2 V)

Table 39 • eMMC Standard Interface

Units

Max

Typ

Min

Symbol

Parameter

TDCEMMCHSCLK

eMMC clock duty

cycle

4.5

–2.0

TEMMCHSCKO

Clock to output de-

lay, all outputs

2.0

TEMMCHSDCK

Input setup time,

all inputs

Microsemi Proprietary and Confidential. DS0147 Revision 1.0

AC Switching Characteristics

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