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PPC5605BAMLL4R bảng dữ liệu(PDF) 13 Page - NXP Semiconductors |
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PPC5605BAMLL4R bảng dữ liệu(HTML) 13 Page - NXP Semiconductors |
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13 / 114 page ![]() Package pinouts and signal descriptions MPC5607B Microcontroller Data Sheet, Rev. 10 NXP Semiconductors 13 3.5 Pad types In the device the following types of pads are available for system pins and functional port pins: S = Slow1 M = Medium1 2 F = Fast1 2 I = Input only with analog feature1 J = Input/Output (‘S’ pad) with analog feature X = Oscillator 3.6 System pins The system pins are listed in Table 4. VSS_HV_ADC0 Reference ground and analog ground for the A/D converter 0 (10-bit) 51 73 89 R15 VDD_HV_ADC0 Reference voltage and analog supply for the A/D converter 0 (10-bit) 52 74 90 P14 VSS_HV_ADC1 Reference ground and analog ground for the A/D converter 1 (12-bit) 59 81 98 N12 VDD_HV_ADC1 Reference voltage and analog supply for the A/D converter 1 (12-bit) 60 82 99 K13 1 A decoupling capacitor must be placed between each of the three VDD_LV/VSS_LV supply pairs to ensure stable voltage (see the recommended operating conditions in the device data sheet). 1. See the I/O pad electrical characteristics in the chip data sheet for details. 2. All medium and fast pads are in slow configuration by default at reset and can be configured as fast or medium. The only exception is PC[1] which is in medium configuration by default (see the PCR.SRC description in the chip reference manual, Pad Configuration Registers (PCR0–PCR148)). Table 4. System pin descriptions Port pin Function RESET configuration Pin number 100 LQFP 144 LQFP 176 LQFP 208 MAP BGA 1 RESET Bidirectional reset with Schmitt-Trigger characteristics and noise filter. I/O M Input weak pull-up after RGM PHASE2 and 40 FIRC cycles 17 21 29 J1 Table 3. Voltage supply pin descriptions (continued) Port pin Function Pin number 100 LQFP 144 LQFP 176 LQFP 208 MAPBGA |
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