STLC4420A datasheet(14/40 Pages) STMICROELECTRONICS

14 / 40 page

Electrical specifications

STLC4420A

14/40

Electrical specifications

Note:

The STLC4420 has an ESD classification of Class TBD.

Warning:

Stresses above those listed in the “Absolute Maximum

Ratings” may cause permanent damage to the device. This is

a stress only rating and operation of the device at these or

any other conditions above those indicated in the operational

sections of this specification is not implied.

Table 2.

General electrical specifications

Parameter

Test condition / comment

Min.

Typ.

Max.

Units

Absolute maximum ratings

PMU VBATT (Vcc)

-0.3

7.0

Voltage on any other pin

Within shared voltage rails

-0.3

Vcc +

0.3

Vcc to Vcc decouple

-0.3

+0.3

Any GND to GND

-0.3

+0.3

Operating conditions and input power specifications

Operating temperature range

-30

VBATT

supply

Input supply voltage

Power Management Unit VBATT

supply input

3.0

3.6

5.5

Average continuous

tx current

Continuous Transmitting @

54Mbps, VBATT = 3.6 V

TBD

Average continue rx

current

Receiving Valid Packets @

54Mbps, VBATT = 3.6 V

TBD

Average standby

mode current

VBATT = 3.6 V

µA

VDIG

supply

Input supply voltage

Power management unit VDIG

supply for digital buffers

3.6

VBATT

Input supply current

VDIG = 3.6 V, Typical load is

application dependent

VIO

supply

Input supply voltage

VIO input supply determines Host

CMOS logic levels for:

SPI_CSX, SPI_CLK, SPI_DIN,

SPI_DOUT, HOST_IRQ,

SLEEP_CLK, FREQ, RF_ACTIVE,

STATUS, TX_CONF,

GPIO4, GPIO5, GPIO6

1.62

1.8

1.98

Input supply current

VIO = 1.8 V

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