STM32G041C6 datasheet(13/121 Pages) STMICROELECTRONICS

13 / 121 page

DS12993 Rev 3

13/121

STM32G041x6/x8

Functional overview

3.1

Arm® Cortex®-M0+ core with MPU

The Cortex-M0+ is an entry-level 32-bit Arm Cortex processor designed for a broad range of

embedded applications. It offers significant benefits to developers, including:

•

a simple architecture, easy to learn and program

•

ultra-low power, energy-efficient operation

•

excellent code density

•

deterministic, high-performance interrupt handling

•

upward compatibility with Cortex-M processor family

•

platform security robustness, with integrated Memory Protection Unit (MPU).

The Cortex-M0+ processor is built on a highly area- and power-optimized 32-bit core, with a

2-stage pipeline Von Neumann architecture. The processor delivers exceptional energy

efficiency through a small but powerful instruction set and extensively optimized design,

providing high-end processing hardware including a single-cycle multiplier.

The Cortex-M0+ processor provides the exceptional performance expected of a modern

32-bit architecture, with a higher code density than other 8-bit and 16-bit microcontrollers.

Owing to embedded Arm core, the STM32G041x6/x8 devices are compatible with Arm tools

and software.

The Cortex-M0+ is tightly coupled with a nested vectored interrupt controller (NVIC)

described in Section 3.13.1.

3.2

Memory protection unit

The memory protection unit (MPU) is used to manage the CPU accesses to memory to

prevent one task to accidentally corrupt the memory or resources used by any other active

task.

The MPU is especially helpful for applications where some critical or certified code has to be

protected against the misbehavior of other tasks. It is usually managed by an RTOS (real-

time operating system). If a program accesses a memory location that is prohibited by the

MPU, the RTOS can detect it and take action. In an RTOS environment, the kernel can

dynamically update the MPU area setting, based on the process to be executed.

The MPU is optional and can be bypassed for applications that do not need it.

3.3

Embedded Flash memory

STM32G041x6/x8 devices feature up to 64 Kbytes of embedded Flash memory available

for storing code and data.

STM32G041C6 bảng dữ liệu(PDF) 13 Page - STMicroelectronics

STM32G041C6 bảng dữ liệu(HTML) 13 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL