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STM32G041C6 bảng dữ liệu(PDF) 83 Page - STMicroelectronics

tên linh kiện STM32G041C6
Giải thích chi tiết về linh kiện  Arm® Cortex®-M0 32-bit MCU, up to 64 KB Flash, 8 KB RAM, 2x USART, timers, ADC, comm. I/Fs, AES, RNG, 1.7-3.6V
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DS12993 Rev 3
83/121
STM32G041x6/x8
Electrical characteristics
94
ENOB
Effective
number of bits
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
10.1
10.2
-
bit
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
9.6
10.2
-
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
9.5
10.2
-
SINAD
Signal-to-noise
and distortion
ratio
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
62.5
63
-
dB
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
59.5
63
-
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
59
63
-
SNR
Signal-to-noise
ratio
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
63
64
-
dB
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
60
64
-
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
60
64
-
THD
Total harmonic
distortion
VDDA = VREF+ = 3 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = 25 °C
--74
-73
dB
2 V < VDDA = VREF+ < 3.6 V;
fADC = 35 MHz; fs ≤ 2.5 MSps;
TA = entire range
--74
-70
1.65 V < VDDA = VREF+ < 3.6 V;
TA = entire range
Range 1: fADC = 35 MHz; fs ≤ 2.2 MSps;
Range 2: fADC = 16 MHz; fs ≤ 1.1 MSps;
--74
-70
1. Based on characterization results, not tested in production.
2. ADC DC accuracy values are measured after internal calibration.
3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion of signal on
another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins susceptible to receive
negative current.
4. I/O analog switch voltage booster enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled
when VDDA ≥ 2.4 V.
Table 59. ADC accuracy(1)(2)(3) (continued)
Symbol
Parameter
Conditions(4)
Min
Typ
Max
Unit



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