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STM32WB50CG bảng dữ liệu(PDF) 102 Page - STMicroelectronics |
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STM32WB50CG bảng dữ liệu(HTML) 102 Page - STMicroelectronics |
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102 / 119 page ![]() Electrical characteristics STM32WB50CG STM32WB30CE 102/119 DS13047 Rev 5 Table 74. ADC accuracy - Limited test conditions 3(1)(2)(3) Symbol Parameter Conditions(4) Min Typ Max Unit ET Total unadjusted error Single ended - 4.5 6.5 LSB Differential - 4.5 5.5 EO Offset error Single ended - 2.5 5 Differential - 2.5 3 EG Gain error Single ended - 3.5 6 Differential - 3.5 5 ED Differential linearity error Single ended - 1.2 1.5 Differential - 1 1.2 EL Integral linearity error Single ended - 2.5 3.5 Differential - 2 2.5 ENOB Effective number of bits Single ended 10 10.4 - bits Differential 10.6 10.7 - SINAD Signal-to-noise and distortion ratio Single ended 62 64 - dB Differential 65 66 - SNR Signal-to-noise ratio Single ended 63 65 - Differential 66 67 - THD Total harmonic distortion Single ended - -71 -67 dB Differential - -72 -71 1. Guaranteed by design. 2. ADC DC accuracy values are measured after internal calibration. 3. ADC accuracy vs. negative injection current: Injecting negative current on any analog input pins must be avoided as this significantly reduces the accuracy of the conversion being performed on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins that may potentially inject negative current. 4. The I/O analog switch voltage booster is enabled when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when VDDA < 2.4 V). It is disabled when VDDA ≥ 2.4 V. No oversampling. |
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