STM32WB50CG datasheet(42/119 Pages) STMICROELECTRONICS

42 / 119 page

Functional overview

STM32WB50CG STM32WB30CE

42/119

DS13047 Rev 5

3.16.5

System window watchdog (WWDG)

The window watchdog is based on a 7-bit downcounter that can be set as free running. It

can be used as a watchdog to reset the device when a problem occurs. It is clocked from

the main clock. It has an early warning interrupt capability and the counter can be frozen in

debug mode.

3.16.6

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

down counter. It features:



a 24-bit down counter



autoreload capability



a maskable system interrupt generation when the counter reaches 0



a programmable clock source.

3.17

Real-time clock (RTC) and backup registers

The RTC is an independent BCD timer/counter, supporting the following features:



Calendar with subsecond, seconds, minutes, hours (12 or 24 format), week day, date,

month, year, in BCD (binary-coded decimal) format.



Automatic correction for 28, 29 (leap year), 30, and 31 days of the month.



Two programmable alarms.



On-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to

synchronize it with a master clock.



Reference clock detection: a more precise second source clock (50 or 60 Hz) can be

used to enhance the calendar precision.



Digital calibration circuit with 0.95 ppm resolution, to compensate for quartz crystal

inaccuracy.



One anti-tamper detection pin with programmable filter.



Timestamp feature, which can be used to save the calendar content. This function can

be triggered by an event on the timestamp pin, or by a tamper event, or by a switch to

VBAT mode.



17-bit auto-reload wakeup timer (WUT) for periodic events with programmable

resolution and period.

The RTC and the 20 backup registers are supplied through a switch that takes power either

from the VDD supply (when present) or from the VBAT pin.

The backup registers are 32-bit registers used to store 80 bytes of user application data

when VDD power is not present. They are not reset by a system or power reset, or when the

device wakes up from Standby or Shutdown mode.

The RTC clock sources can be:



a 32.768 kHz external crystal (LSE)



an external resonator or oscillator (LSE)



one of the internal low power RC oscillators (LSI1 or LSI2, with typical frequency of

32 kHz)



the high-speed external clock (HSE) divided by 32.

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