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SPC58NH84C3 bảng dữ liệu(PDF) 24 Page - STMicroelectronics |
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SPC58NH84C3 bảng dữ liệu(HTML) 24 Page - STMicroelectronics |
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24 / 147 page ![]() Electrical characteristics SPC58EHx, SPC58NHx 24/147 DS12304 Rev 5 4.3.1 Power domains and power up/down sequencing The following table shows the constraints and relationships for the different power domains. Supply1 (on rows) can exceed Supply2 (on columns), only if the cell at the given row and column is reporting ‘ok’. This limitation is valid during power-up and power-down phases, as well as during normal device operation. During power-up, all functional terminals are maintained in a known state as described in the device pinout Microsoft Excel file attached to the IO_Definition document. Table 6. Device supply relation during power-up/power-down sequence Supply2 VDD_LV VDD_HV_IO_ MAIN VDD_HV_FLA VDD_HV_OSC VDD_HV_IO_ ETH0 VDD_HV_IO_ ETH1 VDD_HV_IO_ EMMC VDD_HV_ADV VDD_HV_ADR VDD_LV(1) ok ok ok ok ok ok VDD_HV_IO_MAIN VDD_HV_FLA VDD_HV_OSC(2) ok ok ok ok ok ok VDD_HV_IO_ETH0 ok not allowed ok ok ok ok VDD_HV_IO_ETH1 ok not allowed ok ok ok ok VDD_HV_IO_EMMC ok not allowed ok ok ok ok VDD_HV_ADV ok not allowed ok ok not allowed ok VDD_HV_ADR ok not allowed ok ok not allowed not allowed 1. VDD_LV can be higher than VDD_HV supplies only during power-up/down transient ramps, in case of external LV regulator and if VDD_HV supply voltage level is lower than VDD_LV allowed max operating condition. 2. The application shall grant that these supplies are always at the same voltage level. |
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