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SPC58NH84C3 bảng dữ liệu(PDF) 86 Page - STMicroelectronics |
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SPC58NH84C3 bảng dữ liệu(HTML) 86 Page - STMicroelectronics |
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86 / 147 page  Electrical characteristics SPC58EHx, SPC58NHx 86/147 DS12304 Rev 5 4.16.2.1 DSPI master mode full duplex timing with CMOS pads 4.16.2.1.1 DSPI CMOS master mode – classic timing Note: In the following table, all output timing is worst case and includes the mismatching of rise and fall times of the output pads. Table 43. DSPI channel frequency support DSPI use mode(1) Max usable frequency (MHz)(2),(3) CMOS (Master mode) Full duplex – Classic timing (Table 44) DSPI_0, DSPI_1, DSPI_2, DSPI_3, DSPI_6, DSPI_7, DSPI_8, DSPI_9 10 DSPI_4, DSPI_5 17 Full duplex – Modified timing (Table 45) DSPI_0, DSPI_1, DSPI_2, DSPI_3, DSPI_6, DSPI_7, DSPI_8, DSPI_9 10 DSPI_4, DSPI_5 30 Output only mode (SCK/SOUT/PCS) (Table 44 and Table 45) DSPI_0, DSPI_1, DSPI_2, DSPI_3, DSPI_6, DSPI_7, DSPI_8, DSPI_9 10 DSPI_4, DSPI_5 30 Output only mode TSB mode (SCK/SOUT/PCS) DSPI_0, DSPI_1, DSPI_2, DSPI_3, DSPI_6, DSPI_7, DSPI_8, DSPI_9 10 DSPI_4, DSPI_5 30 CMOS (Slave mode Full duplex) (Table 46)— 16 1. Each DSPI module can be configured to use different pins for the interface. Refer to the device pinout Microsoft Excel file attached to the IO_Definition document for the available combinations. It is not possible to reach the maximum performance with every possible combination of pins. 2. Maximum usable frequency can be achieved if used with fastest configuration of the highest drive pads. 3. Maximum usable frequency does not take into account external device propagation delay. |
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