© VITESSE SEMICONDUCTOR CORPORATION

Page 7

11/9/99

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Datasheet

VSC8166

2.488 Gbit/sec

1:16 SONET/SDH Demux with Clock Recovery

G52252-0, Rev. 3.0

Table 1: AC Characteristics

Parameters

Description

Min

Max

Units

Conditions

Data valid from falling

edge of CLK16O+

01.0

ns

CLK32O transition from

falling edge of CLK16O+

01.0

ns

D[15:0]+/- rise and fall

times

400

ps

20% to 80% into 50 Ohm load

See Figure 7

CLK16O+/- rise and fall

times

400

ps

20% to 80% into 50 Ohm load

See Figure 7

CLK32O+/- rise and fall

times

400

ps

20% to 80% into 50 Ohm load

See Figure 7

CLK16O+/- duty cycle

distortion

45

55

% of

clock

cycle

Parameters

Description

Min

Typ

Max

Units

Conditions

PECL output high

voltage

V

50

Ω Termination to V

2.0V, See Figure 7

PECL output low voltage

2.00

V

50

Ω Termination to V

2.0V, See Figure 7

OLVPECL

Low speed output

voltage differential peak-

to-peak swing.

400

1200

mV

50

Ω Termination to V

2.0V, See Figure 7

IHS

Serial input differential

(DI+/-)

400

1200

mV

AC Coupled, internally

CMI

Serial input common

mode voltage

V

Supply voltage

3.14

—3.47

V

3.3V± 5%

Power dissipation

—1.7

2.3

W

Outputs open,

Supply Current

—

525

660

mA

Outputs open,