AD4116BCPZ datasheet(21/59 Pages) AD

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Data Sheet

AD4116

Rev. 0 | Page 21 of 59

THEORY OF OPERATION

The AD4116 offers the user a fast settling, high resolution,

multiplexed ADC with high levels of configurability, including

the following features:

•

Six fully differential or eleven single-ended voltage inputs.

•

A high impedance voltage divider with integrated

precision matched resistors

•

Embedded proprietary iPassives technology within a small

device footprint.

•

Two differential or four single-ended low level direct ADC

inputs.

•

Per channel configurability—up to eight different setups

can be defined. A separate setup can be mapped to each of

the channels. Each setup allows the user to configure whether

the buffers are enabled or disabled, gain and offset correction,

filter type, ODR, and reference source selection.

•

Highly configurable digital filter enabling conversion rates

up to 62.5 kSPS on a single channel and 12.422 kSPS

switching using sinc5 + sinc1 filter.

The AD4116 includes a precision, 2.5 V, low drift (5 ppm/°C),

band gap internal reference. This reference can be selected for

use in ADC conversions, reducing the external component

count. When enabled, the internal reference is output to the

REFOUT pin. It can be used as a low noise biasing voltage for

the external circuitry and must be connected to a 0.1 μF

decoupling capacitor.

The AD4116 includes two separate linear regulator blocks for

both the analog and digital circuitry. The analog LDO regulator

regulates the AVDD supply to 1.8 V.

The linear regulator for the digital IOVDD supply performs a

similar function, regulating the input voltage applied at the

IOVDD pin to 1.8 V. The serial interface signals always operate

from the IOVDD supply seen at the pin; meaning that, if 3.3 V

is applied to the IOVDD pin, the interface logic inputs and

outputs operate at this level.

The AD4116 is designed for a multitude of factory automation

and process control applications, such as programmable logic

controller (PLC) and distributed control system (DCS) modules.

The AD4116 reduces overall system cost and design burden

while maintaining a high level of accuracy. The AD4116 offers

the following system benefits:

•

A single 5 V power supply.

•

A guaranteed minimum 10 MΩ input impedance.

•

An overrange voltage greater than ±10 V.

•

A buffered low level input voltage.

•

A high channel count

•

Reduced calibration costs.

DGND

AD4116

IOVDD

REGCAPD

AVSS

REGCAPA

AVDD

XTAL1

IOVDD

0.1µF

AVDD

0.1µF

CX1

16MHz

CX2

0.1µF

1µF

0.1µF

1µF

OPTIONAL EXTERNAL

CRYSTAL CIRCUITRY

CAPACITORS

CLKIN

OPTIONAL

EXTERNAL

CLOCK

INPUT

VIN0

VIN1

VINCOM

XTAL2/CLKIO

DOUT/RDY

DIN

SCLK

DOUT/RDY

DIN

SCLK

VBIAS–

REFOUT

0.1µF

VIN10

ADCIN11

ADCIN12

ADCIN15

±10V

±VREF

Figure 33. Typical Connection Diagram

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