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AD4116BCPZ bảng dữ liệu(PDF) 58 Page - Analog Devices

tên linh kiện AD4116BCPZ
Giải thích chi tiết về linh kiện  Single Supply, 24-Bit, Sigma-Delta ADC with 짹10 V, 10 M廓 Inputs and Buffered Low Level Inputs
PDF  59 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD4116BCPZ bảng dữ liệu(HTML) 58 Page - Analog Devices

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AD4116
Data Sheet
Rev. 0 | Page 58 of 59
Bits
Bit Name
Settings
Description
Reset
Access
01100
390.6 SPS (400.64 SPS for sinc3).
01101
200.3 SPS (200.32 SPS for sinc3).
01110
100.0 SPS.
01111
59.75 SPS (59.98 SPS for sinc3).
10000
49.84 SPS (50 SPS for sinc3).
10001
20.00 SPS.
10010
16.65 SPS (16.67 SPS for sinc3).
10011
10.00 SPS.
10100
5.00 SPS.
10101
2.50 SPS.
10110
1.25 SPS.
OFFSET REGISTER 0 TO OFFSET REGISTER 7
Address: 0x30 to 0x37, Reset: 0x800000, Name: OFFSET0 to OFFSET7
The offset (zero-scale) registers are 16-bit registers that can be used to compensate for any offset error in the ADC or in the system. The
layout for OFFSET0 to OFFSET7 is identical.
Table 36. Bit Descriptions for OFFSET0 to OFFSET7
Bits
Bit Name
Settings
Description
Reset
Access
[23:0]
OFFSETx
Offset calibration coefficient for Setup 0.
0x800000
R/W
GAIN REGISTER 0 TO GAIN REGISTER 7
Address: 0x38 to 0x3F, Reset: 0x5XXXX0, Name: GAIN0 to GAIN7
The gain (full-scale) registers are 16-bit registers that can be used to compensate for any gain error in the ADC or in the system. The
layout for GAIN0 to GAIN7 is identical.
Table 37. Bit Descriptions for GAIN0 to GAIN7
Bits
Bit Name
Settings
Description
Reset1
Access
[23:0]
GAINx
Gain calibration coefficient for Setup 0.
0x5XXXX0
R/W
1
X means don’t care.



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