W5300 datasheet(21/128 Pages) WIZNET

21 / 128 page

/SPDLED(MII_TXD0)

OML

Link speed LED/Transmit Data

It is asserted low at the 100Mbps and high at the 10Mbps

according to auto-negotiation or manual configuration of

OP_MODE[2:0].

1.7 Clock Signals

For the clock source of W5300, either a crystal or an oscillator may be used. 25MHz frequency

from the clock source is created to 150MHz frequency using internal PLL logic. This 150MHz

frequency is used for PLL_CLK(Period 6.67ns) and W5300 core operation clock.

Symbol

Type

Description

XTLP

25MHz crystal input/output

25MHz parallel-resonant crystal is used with matching capacitor for internal

oscillator stabilization.

Refer to

“Clock Characteristic” of “7.Electrical Specifications”

These can be used for i

nternal PHY mode(TEST_MODE[3:0]=”0000”) or

external PHY m

ode with crystal clock (TEST_MODE[3:0]=”0001”).

When using oscillator at the internal PHY mode, be sure to use 1.8V level

oscillator and connect only to XTLP. And let be float XTLN.

XTLN

OSC25I

25MHz Oscillator input

used

only

external

PHY

mode

with

oscillator

clock

(TEST_MODE[3:0]=”0010”). In order to prevent the leakage current, be

sure to keep XTLP high and float XTLN, and use 1.8v level oscillator.

1.8 Power Supply Signals

Symbol

Type

Description

VCC3A3

Power

3.3V power supply for Analog part

Be sure to connect 10uF tantalum capacitor between VCC343 and

GNDA in order to prevent power compensation.

VCC3V3

Power

3.3V power supply for Digital part

Between each VCC and GND, 0.1uF decoupling capacitor can be

selectively connected. VCC3V3 can be separated to 1uH ferrite

bead and connected to VCC3A3.

VCC1A8

Power

1.8V power supply for Analog part

Be sure to connect a 10uF tantalum capacitor and 0.1uF capacitor

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