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MMPF0200Z bảng dữ liệu(PDF) 94 Page - NXP Semiconductors

tên linh kiện MMPF0200Z
Giải thích chi tiết về linh kiện  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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MMPF0200Z bảng dữ liệu(HTML) 94 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
94
Freescale Semiconductor
PF0200Z
Functional Block Requirements and Behaviors
Control Interface I2C Block Description
6.5.5
Specific Registers
6.5.5.1
IC and Version Identification
The IC and other version details can be read via identification bits. These are hard-wired on chip and described in Tables 113 to
115.
VGEN5FAULTS
4
R
0
VGEN5 Overcurrent sense bit
0 = Normal operation
1 = Above current limit
VGEN6FAULTS
5
R
0
VGEN6 Overcurrent sense bit
0 = Normal operation
1 = Above current limit
UNUSED
7:6
–
00
Unused
Table 113. Register DEVICEID - ADDR 0x00
Name
Bit #
R/W
Default
Description
DEVICEID
3:0
R
0x01
Die version.
0001 = PF0200
UNUSED
7:4
–
0x01
Unused
Table 114. Register SILICON REV- ADDR 0x03
Name
Bit #
R/W
Default
Description
METAL_LAYER_REV
3:0
R
XX
Represents the metal mask revision
Pass 0.0 = 0000
.
.
Pass 0.15 = 1111
FULL_LAYER_REV
7:4
R
XX
Represents the full mask revision
Pass 1.0 = 0001
.
.
Pass 15.0 = 1111
Notes
69.
Default value depends on the silicon revision.
Table 115. Register FABID - ADDR 0x04
Name
Bit #
R/W
Default
Description
FIN
1:0
R
0x00
Allows for characterizing different options within
the same reticule
FAB
3:2
R
0x00
Represents the wafer manufacturing facility
Unused
7:0
R
0x00
Unused
Table 112. Register INTSENSE4 - ADDR 0x13 (continued)
Name
Bit #
R/W
Default
Description



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