56F8335 datasheet(23/160 Pages) FREESCALE

23 / 160 page

Signal Pins

56F8335 Technical Data, Rev. 1

Freescale Semiconductor

Preliminary

PHASEA0

(TA0)

(GPIOC4)

127

Schmitt

Input

Schmitt

Input/

Output

Schmitt

Input/

Output

Input

Phase A — Quadrature Decoder 0, PHASEA input

TA0 — Timer A, Channel 0

Port C GPIO — This GPIO pin can be individually programmed

as an input or output pin.

After reset, the default state is PHASEA0.

To deactivate the internal pull-up resistor, clear bit 4 of the

GPIOC_PUR register.

PHASEB0

(TA1)

(GPIOC5)

128

Schmitt

Input

Schmitt

Input/

Output

Schmitt

Input/

Output

Input

Phase B — Quadrature Decoder 0, PHASEB input

TA1 — Timer A, Channel 1

Port C GPIO — This GPIO pin can be individually programmed

as an input or output pin.

After reset, the default state is PHASEB0.

To deactivate the internal pull-up resistor, clear bit 5 of the

GPIOC_PUR register.

INDEX0

(TA2)

(GPIOC6)

1Schmitt

Input

Schmitt

Input/

Output

Schmitt

Input/

Output

Input

Index — Quadrature Decoder 0, INDEX input

TA2 — Timer A, Channel 2

Port C GPIO — This GPIO pin can be individually programmed

as an input or output pin.

After reset, the default state is INDEX0.

To deactivate the internal pull-up resistor, clear bit 6 of the

GPIOC_PUR register.

Table 2-2 Signal and Package Information for the 128-Pin LQFP

Signal

Name

Pin No.

Type

State

During

Reset

Signal Description

56F8335 bảng dữ liệu(PDF) 23 Page - Freescale Semiconductor, Inc

56F8335 bảng dữ liệu(HTML) 23 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL