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IMX7ULPCEC bảng dữ liệu(PDF) 85 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  i.MX 7ULP Applications Processor-Consumer Products
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nhà sản xuất  NXP [NXP Semiconductors]
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IMX7ULPCEC bảng dữ liệu(HTML) 85 Page - NXP Semiconductors

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Table 53. ADC electrical specifications (1V≤VREFH<VDD_ANA18MIN and
VADINMAX≤VREFH)1 (continued)
Symbol
Description
Min
Typ2
Max
Unit
Notes
EZS
Zero-scale
error
0.05
LSB
5
Iin_ext_leak
External
channel
leakage
current
30
500
nA
EIL
Input leakage
error
RAS * Iin
mV
1. Values in this table are based on design simulations.
2. Typical values assume VDD_ANA_18 = 1.8 V, Temp = 25 °C, fACLK = Max, unless otherwise stated. Typical values
are for reference only, and are not tested in production.
3. This resistance is external to the SoC. To achieve the best results, the analog source resistance must be kept as low
as possible. The results in this data sheet were derived from a system that had < 15 Ω analog source resistance. The
RAS/CAS time constant should be kept to < 1 ns.
4. See Sample time vs. RAS.
5. 1 LSB = (VREFH - VREFL)/2N, N=12
6. ADC conversion clock at max frequency and using linear histogram.
7. Input data used for test was 1 kHz sine wave.
The following figure shows a plot of the ADC sample time versus RAS.
Figure 32. Sample time vs. RAS
Specifications—real-time domain
i.MX 7ULP Applications Processor—Consumer Products, Rev. 0, 06/2019
85
NXP Semiconductors



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