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DS20006554A bảng dữ liệu(PDF) 10 Page - Microchip Technology

tên linh kiện DS20006554A
Giải thích chi tiết về linh kiện  1-APLL, 6- or 10-Output Any-to-Any Clock Multiplier and Frequency Synthesizer
PDF  94 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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ZL30260-ZL30263
Data Sheet
10
© 2021 Microchip Technology Inc.
DS20006554A
5.2.1
ZL30260 and ZL30262
—Internal ROM, External or No EEPROM
For these part numbers the IF[1:0] pins specify the processor interface mode, the I2C slave address and whether the
device should auto-configure from internal ROM or external EEPROM. The AC[2:0] pins specify which device
configuration in the ROM or EEPROM to execute after reset. Descriptions of the standard-product ROM
configurations are available from Microchip.
IF1
IF0
Processor Interface
Configuration Memory to Use
0
0
I2C, slave address 11101 00
Internal ROM
0
1
I2C, slave address 11101 01
Internal ROM
1
0
SPI Slave
Internal ROM
1
1
SPI Master during auto-configuration
then SPI Slave
External SPI EEPROM
To configure the device as specified in the first three rows above but without auto-configuring from internal ROM, wire devices pins as
follows: TEST=1 and AC[2:0]=011, as described in section 5.2.
AC2
AC1
AC0
Auto Configuration
0
0
0
Configuration 0
0
0
1
Configuration 1
0
1
0
Configuration 2
0
1
1
Configuration 3
1
0
0
Configuration 4
1
0
1
Configuration 5
1
1
0
Configuration 6
1
1
1
Configuration 7
Notes about the device auto-configuring from external EEPROM:
1.
The device’s CSN pin should have a pull-up resistor to VDD to ensure its processor interface is inactive after
auto-configuration is complete. The SCLK, MISO and MOSI pins should also have pull-up resistors to VDD
to keep them from floating.
2.
If a processor or similar device will access device registers after the device has auto-configured from external
EEPROM, the SPI SCLK, MOSI and MISO wires can be connected directly to the processor, the device and
the external EEPROM. The processor and device CSN pins can be wired together also. The EEPROM CSN
signal must be controlled by the device’s CSN pin during device auto-configuration and then held inactive
when the processor accesses device registers.
3.
The bits of the I2C address are as shown above by default but can be changed in the I2CA register.
5.2.2
ZL30261 and ZL30263
—Internal EEPROM
For these part numbers the IF[1:0] pins specify the processor interface mode and the I2C slave address. The AC[2:0]
pins specify which device configuration in the EEPROM to execute after reset.
IF1
IF0
Processor Interface
0
0
I2C, slave address 11101 00
0
1
I2C, slave address 11101 01
1
0
I2C, slave address 11101 10
1
1
SPI Slave
AC2
AC1
AC0
Auto Configuration
0
0
0
Configuration 0
0
0
1
Configuration 1
0
1
0
Configuration 2
0
1
1
Configuration 3
1
0
0
Configuration 4
1
0
1
Configuration 5
1
1
0
Configuration 6
1
1
1
Configuration 7



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